Layers of dielectric film are used in several applications in sub-micron integrated circuit (IC) fabrication. Four such applications are shallow trench isolation (STI), premetal dielectric (PMD), inter-metal dielectric (IMD) and interlayer dielectric (ILD). All four of these layers require silicon dioxide films that fill features of various sizes and have uniform film thicknesses across the wafer.
Chemical vapor deposition (CVD) has traditionally been the method of choice for depositing conformal silicon dioxide films. However, as design rules continue to shrink, the aspect ratios (depth to width) of features increase, and traditional CVD techniques can no longer provide adequately conformal films in these high aspect ratio features.
Two alternatives to CVD are atomic layer deposition (ALD) and pulsed deposition layer (PDL). ALD methods involve self-limiting adsorption of reactant gases and can provide thin, conformal dielectric films within high aspect ratio features. ALD methods have been developed for the deposition of silicon oxide film. An ALD-based dielectric deposition technique typically involves adsorbing a metal containing precursor onto the substrate surface, then, in a second procedure, introducing a silicon oxide precursor gas. The silicon oxide precursor gas reacts with the adsorbed metal precursor to form a thin film of metal-doped silicon oxide. Films produced by ALD are very thin (i.e., about one monolayer); therefore, numerous ALD cycles must be repeated to adequately fill a gap feature.
PDL processing (also known as rapid vapor deposition (RVD) processing) is similar to ALD in that reactant gases are introduced alternately over the substrate surface, but in PDL the silicon oxide film can grow more thickly. Thus, PDL methods allow for rapid film growth similar to using CVD methods but with the film conformality of ALD methods.
While ALD and PDL are useful to form conformal films, conventional ALD and PDL processes are apt to result in areas of low density forming in the films. The conformal nature of ALD and PDL processes means that the aspect ratios of the gaps increase with successive cycles. Diffusion limitations prevent precursor materials from reaching the bottom of these high aspect ratio gaps. Hence, the top of a gap may fill with silicon oxide more quickly than the bottom, preventing further diffusion of the precursor materials into the gap. As a result, areas of low density form. These areas can expand and become voids and seams in subsequent processing steps. Voids and seams ultimately may cause device failure.
Currently, thermal annealing processes are used to increase film density after the film is deposited. While these processes increase density, the temperatures used (around 700° C.) are unsuitably high for many applications. For example, PMD applications often require substrate temperatures of less than 400° C.
What is therefore needed are improved methods for forming conformal films with increased density, particularly for applications requiring low thermal budgets.